HI, ACID ...
the reason is i am given a task to prepare a presentation on SoC level IP emulators. In other words, my company creates silicon IP, including I/Os, SRAM, standard cells etc. And before this IP goes through chip-level verification, an emulator is used for debug purposes ... The reason for the query was to get to know if there are people familiar with SoC design principles, in particular with silicon IP QA principles ...
Do you have experience in this field ... If not I would not venture into details of what's an SoC and silicon IP to maintain simplicity ... If yes, please help with a clue if you have any